; RUN: llvm-as %s -o %t.bc
; RUN: not llvm-spirv %t.bc -spirv-text -o %t.txt 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
; RUN: llvm-spirv %t.bc -spirv-text --spirv-ext=+SPV_KHR_integer_dot_product -o %t.txt
; RUN: FileCheck < %t.txt %s --check-prefix=CHECK-SPIRV
; RUN: llvm-spirv --spirv-ext=+SPV_KHR_integer_dot_product %t.bc -o %t.spv
; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM

; CHECK-ERROR: Feature requires the following SPIR-V extension:
; CHECK-ERROR-NEXT: SPV_KHR_integer_dot_product

; CHECK-SPIRV: Capability DotProductInputAllKHR
; CHECK-SPIRV: Capability DotProductInput4x8BitKHR
; CHECK-SPIRV: Capability DotProductInput4x8BitPackedKHR
; CHECK-SPIRV: Capability DotProductKHR
; CHECK-SPIRV: Extension "SPV_KHR_integer_dot_product"

; CHECK-SPIRV-DAG: TypeInt [[#I8:]] 8
; CHECK-SPIRV-DAG: TypeInt [[#I16:]] 16
; CHECK-SPIRV-DAG: TypeInt [[#I32:]] 32
; CHECK-SPIRV-DAG: TypeInt [[#I64:]] 64

target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
target triple = "spir-unknown-unknown"

; Packed vector format: 32-bit scalar interpreted as v4i8.
; CHECK-LLVM: @TestNonSatPacked
; CHECK-SPIRV: Function

; CHECK-LLVM: call spir_func i8 @_Z22__spirv_SDotKHR_Ruchariii
; CHECK-LLVM: call spir_func i16 @_Z23__spirv_SDotKHR_Rushortiii
; CHECK-LLVM: call spir_func i32 @_Z21__spirv_SDotKHR_Ruintiii
; CHECK-LLVM: call spir_func i64 @_Z22__spirv_SDotKHR_Rulongiii

; CHECK-LLVM: call spir_func i8 @_Z22__spirv_UDotKHR_Ruchariii
; CHECK-LLVM: call spir_func i16 @_Z23__spirv_UDotKHR_Rushortiii
; CHECK-LLVM: call spir_func i32 @_Z21__spirv_UDotKHR_Ruintiii
; CHECK-LLVM: call spir_func i64 @_Z22__spirv_UDotKHR_Rulongiii

; CHECK-LLVM: call spir_func i8 @_Z23__spirv_SUDotKHR_Ruchariii
; CHECK-LLVM: call spir_func i16 @_Z24__spirv_SUDotKHR_Rushortiii
; CHECK-LLVM: call spir_func i32 @_Z22__spirv_SUDotKHR_Ruintiii
; CHECK-LLVM: call spir_func i64 @_Z23__spirv_SUDotKHR_Rulongiii

; CHECK-SPIRV: 6 SDotKHR [[#I8]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 SDotKHR [[#I16]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 SDotKHR [[#I32]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 SDotKHR [[#I64]] [[#]] [[#]] [[#]] 0

; CHECK-SPIRV: 6 UDotKHR [[#I8]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 UDotKHR [[#I16]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 UDotKHR [[#I32]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 UDotKHR [[#I64]] [[#]] [[#]] [[#]] 0

; CHECK-SPIRV: 6 SUDotKHR [[#I8]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 SUDotKHR [[#I16]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 SUDotKHR [[#I32]] [[#]] [[#]] [[#]] 0
; CHECK-SPIRV: 6 SUDotKHR [[#I64]] [[#]] [[#]] [[#]] 0

; Function Attrs: nounwind
define spir_kernel void @TestNonSatPacked(i32 %0, i32 %1) #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !7 !kernel_arg_type_qual !8 !kernel_arg_base_type !7 {
  %3 = call spir_func i8 @_Z22__spirv_SDotKHR_Ruchariii(i32 %0, i32 %1, i32 0) #0
  %4 = call spir_func i16 @_Z23__spirv_SDotKHR_Rushortiii(i32 %0, i32 %1, i32 0) #0
  %5 = call spir_func i32 @_Z21__spirv_SDotKHR_Ruintiii(i32 %0, i32 %1, i32 0) #0
  %6 = call spir_func i64 @_Z22__spirv_SDotKHR_Rulongiii(i32 %0, i32 %1, i32 0) #0

  %7 = call spir_func i8 @_Z22__spirv_UDotKHR_Ruchariii(i32 %0, i32 %1, i32 0) #0
  %8 = call spir_func i16 @_Z23__spirv_UDotKHR_Rushortiii(i32 %0, i32 %1, i32 0) #0
  %9 = call spir_func i32 @_Z21__spirv_UDotKHR_Ruintiii(i32 %0, i32 %1, i32 0) #0
  %10 = call spir_func i64 @_Z22__spirv_UDotKHR_Rulongiii(i32 %0, i32 %1, i32 0) #0

  %11 = call spir_func i8 @_Z23__spirv_SUDotKHR_Ruchariii(i32 %0, i32 %1, i32 0) #0
  %12 = call spir_func i16 @_Z24__spirv_SUDotKHR_Rushortiii(i32 %0, i32 %1, i32 0) #0
  %13 = call spir_func i32 @_Z22__spirv_SUDotKHR_Ruintiii(i32 %0, i32 %1, i32 0) #0
  %14 = call spir_func i64 @_Z23__spirv_SUDotKHR_Rulongiii(i32 %0, i32 %1, i32 0) #0
  ret void
}

; Vector format: v4i8.
; CHECK-LLVM: @TestNonSatVec
; CHECK-SPIRV: Function

; CHECK-LLVM: call spir_func i8 @_Z22__spirv_SDotKHR_RucharDv4_cS_
; CHECK-LLVM: call spir_func i16 @_Z23__spirv_SDotKHR_RushortDv4_cS_
; CHECK-LLVM: call spir_func i32 @_Z21__spirv_SDotKHR_RuintDv4_cS_
; CHECK-LLVM: call spir_func i64 @_Z22__spirv_SDotKHR_RulongDv4_cS_

; CHECK-LLVM: call spir_func i8 @_Z22__spirv_UDotKHR_RucharDv4_cS_
; CHECK-LLVM: call spir_func i16 @_Z23__spirv_UDotKHR_RushortDv4_cS_
; CHECK-LLVM: call spir_func i32 @_Z21__spirv_UDotKHR_RuintDv4_cS_
; CHECK-LLVM: call spir_func i64 @_Z22__spirv_UDotKHR_RulongDv4_cS_

; CHECK-LLVM: call spir_func i8 @_Z23__spirv_SUDotKHR_RucharDv4_cS_
; CHECK-LLVM: call spir_func i16 @_Z24__spirv_SUDotKHR_RushortDv4_cS_
; CHECK-LLVM: call spir_func i32 @_Z22__spirv_SUDotKHR_RuintDv4_cS_
; CHECK-LLVM: call spir_func i64 @_Z23__spirv_SUDotKHR_RulongDv4_cS_

; CHECK-SPIRV: 5 SDotKHR [[#I8]]
; CHECK-SPIRV: 5 SDotKHR [[#I16]]
; CHECK-SPIRV: 5 SDotKHR [[#I32]]
; CHECK-SPIRV: 5 SDotKHR [[#I64]]

; CHECK-SPIRV: 5 UDotKHR [[#I8]]
; CHECK-SPIRV: 5 UDotKHR [[#I16]]
; CHECK-SPIRV: 5 UDotKHR [[#I32]]
; CHECK-SPIRV: 5 UDotKHR [[#I64]]

; CHECK-SPIRV: 5 SUDotKHR [[#I8]]
; CHECK-SPIRV: 5 SUDotKHR [[#I16]]
; CHECK-SPIRV: 5 SUDotKHR [[#I32]]
; CHECK-SPIRV: 5 SUDotKHR [[#I64]]

; Function Attrs: nounwind
define spir_kernel void @TestNonSatVec(<4 x i8> %0, <4 x i8> %1) #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !9 !kernel_arg_type_qual !8 !kernel_arg_base_type !9 {
  %3 = call spir_func i8 @_Z22__spirv_SDotKHR_RucharDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %4 = call spir_func i16 @_Z23__spirv_SDotKHR_RushortDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %5 = call spir_func i32 @_Z21__spirv_SDotKHR_RuintDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %6 = call spir_func i64 @_Z22__spirv_SDotKHR_RulongDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0

  %7 = call spir_func i8 @_Z22__spirv_UDotKHR_RucharDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %8 = call spir_func i16 @_Z23__spirv_UDotKHR_RushortDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %9 = call spir_func i32 @_Z21__spirv_UDotKHR_RuintDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %10 = call spir_func i64 @_Z22__spirv_UDotKHR_RulongDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0

  %11 = call spir_func i8 @_Z23__spirv_SUDotKHR_RucharDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %12 = call spir_func i16 @_Z24__spirv_SUDotKHR_RushortDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %13 = call spir_func i32 @_Z22__spirv_SUDotKHR_RuintDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  %14 = call spir_func i64 @_Z23__spirv_SUDotKHR_RulongDv4_cS_(<4 x i8> %0, <4 x i8> %1) #0
  ret void
}

; Vector format: v2i16, which is a case of DotProductInputAllKHR.
; CHECK-LLVM: @TestNonSatAll
; CHECK-SPIRV: Function

; CHECK-LLVM: call spir_func i16 @_Z23__spirv_SDotKHR_RushortDv2_sS_
; CHECK-LLVM: call spir_func i32 @_Z21__spirv_SDotKHR_RuintDv2_sS_
; CHECK-LLVM: call spir_func i64 @_Z22__spirv_SDotKHR_RulongDv2_sS_

; CHECK-LLVM: call spir_func i16 @_Z23__spirv_UDotKHR_RushortDv2_sS_
; CHECK-LLVM: call spir_func i32 @_Z21__spirv_UDotKHR_RuintDv2_sS_
; CHECK-LLVM: call spir_func i64 @_Z22__spirv_UDotKHR_RulongDv2_sS_

; CHECK-LLVM: call spir_func i16 @_Z24__spirv_SUDotKHR_RushortDv2_sS_
; CHECK-LLVM: call spir_func i32 @_Z22__spirv_SUDotKHR_RuintDv2_sS_
; CHECK-LLVM: call spir_func i64 @_Z23__spirv_SUDotKHR_RulongDv2_sS_

; CHECK-SPIRV: 5 SDotKHR [[#I16]]
; CHECK-SPIRV: 5 SDotKHR [[#I32]]
; CHECK-SPIRV: 5 SDotKHR [[#I64]]

; CHECK-SPIRV: 5 UDotKHR [[#I16]]
; CHECK-SPIRV: 5 UDotKHR [[#I32]]
; CHECK-SPIRV: 5 UDotKHR [[#I64]]

; CHECK-SPIRV: 5 SUDotKHR [[#I16]]
; CHECK-SPIRV: 5 SUDotKHR [[#I32]]
; CHECK-SPIRV: 5 SUDotKHR [[#I64]]

; Function Attrs: nounwind
define spir_kernel void @TestNonSatAll(<2 x i16> %0, <2 x i16> %1) #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !10 !kernel_arg_type_qual !8 !kernel_arg_base_type !10 {
  %3 = call spir_func i16 @_Z23__spirv_SDotKHR_RushortDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0
  %4 = call spir_func i32 @_Z21__spirv_SDotKHR_RuintDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0
  %5 = call spir_func i64 @_Z22__spirv_SDotKHR_RulongDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0

  %6 = call spir_func i16 @_Z23__spirv_UDotKHR_RushortDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0
  %7 = call spir_func i32 @_Z21__spirv_UDotKHR_RuintDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0
  %8 = call spir_func i64 @_Z22__spirv_UDotKHR_RulongDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0

  %9 = call spir_func i16 @_Z24__spirv_SUDotKHR_RushortDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0
  %10 = call spir_func i32 @_Z22__spirv_SUDotKHR_RuintDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0
  %11 = call spir_func i64 @_Z23__spirv_SUDotKHR_RulongDv2_sS_(<2 x i16> %0, <2 x i16> %1) #0
  ret void
}

; Function Attrs: nounwind
declare spir_func i8 @_Z22__spirv_SDotKHR_Ruchariii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z23__spirv_SDotKHR_Rushortiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z21__spirv_SDotKHR_Ruintiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z22__spirv_SDotKHR_Rulongiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i8 @_Z22__spirv_UDotKHR_Ruchariii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z23__spirv_UDotKHR_Rushortiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z21__spirv_UDotKHR_Ruintiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z22__spirv_UDotKHR_Rulongiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i8 @_Z23__spirv_SUDotKHR_Ruchariii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z24__spirv_SUDotKHR_Rushortiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z22__spirv_SUDotKHR_Ruintiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z23__spirv_SUDotKHR_Rulongiii(i32, i32, i32) #0

; Function Attrs: nounwind
declare spir_func i8 @_Z22__spirv_SDotKHR_RucharDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z23__spirv_SDotKHR_RushortDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z21__spirv_SDotKHR_RuintDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z22__spirv_SDotKHR_RulongDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i8 @_Z22__spirv_UDotKHR_RucharDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z23__spirv_UDotKHR_RushortDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z21__spirv_UDotKHR_RuintDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z22__spirv_UDotKHR_RulongDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i8 @_Z23__spirv_SUDotKHR_RucharDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z24__spirv_SUDotKHR_RushortDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z22__spirv_SUDotKHR_RuintDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z23__spirv_SUDotKHR_RulongDv4_cS_(<4 x i8>, <4 x i8>) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z23__spirv_SDotKHR_RushortDv2_sS_(<2 x i16>, <2 x i16>) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z21__spirv_SDotKHR_RuintDv2_sS_(<2 x i16>, <2 x i16>) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z22__spirv_SDotKHR_RulongDv2_sS_(<2 x i16>, <2 x i16>) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z23__spirv_UDotKHR_RushortDv2_sS_(<2 x i16>, <2 x i16>) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z21__spirv_UDotKHR_RuintDv2_sS_(<2 x i16>, <2 x i16>) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z22__spirv_UDotKHR_RulongDv2_sS_(<2 x i16>, <2 x i16>) #0

; Function Attrs: nounwind
declare spir_func i16 @_Z24__spirv_SUDotKHR_RushortDv2_sS_(<2 x i16>, <2 x i16>) #0

; Function Attrs: nounwind
declare spir_func i32 @_Z22__spirv_SUDotKHR_RuintDv2_sS_(<2 x i16>, <2 x i16>) #0

; Function Attrs: nounwind
declare spir_func i64 @_Z23__spirv_SUDotKHR_RulongDv2_sS_(<2 x i16>, <2 x i16>) #0

attributes #0 = { nounwind }

!spirv.MemoryModel = !{!0}
!opencl.enable.FP_CONTRACT = !{}
!spirv.Source = !{!1}
!opencl.spir.version = !{!2}
!opencl.ocl.version = !{!2}
!opencl.used.extensions = !{!3}
!opencl.used.optional.core.features = !{!3}
!spirv.Generator = !{!4}

!0 = !{i32 2, i32 2}
!1 = !{i32 3, i32 102000}
!2 = !{i32 1, i32 2}
!3 = !{}
!4 = !{i16 7, i16 0}
!5 = !{i32 0, i32 0}
!6 = !{!"none", !"none"}
!7 = !{!"int", !"int"}
!8 = !{!"", !""}
!9 = !{!"char4", !"char4"}
!10 = !{!"short2", !"short2"}
